A two-channel 16-bit analog-to-digital (A/D) converter employing oversampling techniques has been developed. The device contains two fourth-order delta-sigma modulators with 1-bit outputs, each followed by a digital finite impulse response filter/decimator. The analog inputs are samples at 3.072 MHz and the digital words are output at 48 kHz.

Authors: Welland, David R.; Del Signore, Bruce P.; Swanson, Eric J.; Tanaka, Tadashi; Hamashita, Koichi; Hara, Susumu; Takasuka, Kaoru
Affiliations: Crystal Semiconductor Corporation, Austin, TX ; Asahi Kasei Microsystems, Inc., Tokyo, Japan(See document for exact affiliation information.)
JAES Volume 37 Issue 6 pp. 476-486; June 1989
Publication Date: June 1, 1989

Click to purchase paper as a non-member or you can login as an AES member to see more options.

No AES members have commented on this paper yet.

Subscribe to this discussion

To be notified of new comments on this paper you can subscribe to this RSS feed. Forum users should login to see additional options.

Start a discussion!

If you would like to start a discussion about this paper and are an AES member then you can login here:
Username:
Password:

If you are not yet an AES member and have something important to say about this paper then we urge you to join the AES today and make your voice heard. You can join online today by clicking here.