A microprogrammed high-speed signal processor is presented. Bipolar bit-slice arithmetic logic units (ALU) combined with high-speed parallel multipliers permit the processing programs, such as digital filters and reverberation simulations requiring many additions and multiplications, to be executed rapidly and efficiently. Microinstructions and the microprogram development system, designed for this machine, are also described.

Authors: Sekiguchi, Keisuke; Ishizaka, Koichi; Matsudaira, T. Ken; Nakajima, Heitaro
Affiliation: Sony Corporation, Tokyo, Japan
JAES Volume 31 Issue 7/8 pp. 517-522; August 1983
Publication Date: August 1, 1983

Click to purchase paper as a non-member or you can login as an AES member to see more options.

No AES members have commented on this paper yet.

Subscribe to this discussion

To be notified of new comments on this paper you can subscribe to this RSS feed. Forum users should login to see additional options.

Start a discussion!

If you would like to start a discussion about this paper and are an AES member then you can login here:
Username:
Password:

If you are not yet an AES member and have something important to say about this paper then we urge you to join the AES today and make your voice heard. You can join online today by clicking here.