Community

AES Engineering Briefs Forum

Graphical Development Design for a Heterogeneous DSP Core Architecture

Document Thumbnail

For over 15 years, Analog Devices has continued improving its graphical programming environment to support several, audio specific and general purpose digital signal processors (DSPs). As of 2016, all supported processors have either contained single or dual DSP cores whereas both of them have had the same architecture. With the need to have a heterogeneous DSP architecture the team had the challenge to program both cores within the same environment. This paper describes challenges, trade-offs and design decisions made when programming a new heterogeneous DSP core architecture.

Author:
Affiliation:
AES Convention: eBrief:
Publication Date:
Subject:

Click to purchase paper as a non-member or you can login as an AES member to see more options.

No AES members have commented on this paper yet.

Subscribe to this discussion

RSS Feed To be notified of new comments on this paper you can subscribe to this RSS feed. Forum users should login to see additional options.

Start a discussion!

If you would like to start a discussion about this paper and are an AES member then you can login here:
Username:
Password:

If you are not yet an AES member and have something important to say about this paper then we urge you to join the AES today and make your voice heard. You can join online today by clicking here.

AES - Audio Engineering Society