Before designing to stabilize circuit drift due to changing temperatures it is helpful and sometimes necessary to understand and explain the physics of the observed drifts. In the case of the Junction Gate FET this enables minimizing of temperature effects using the characteristics of the device itself. It is the purpose of this paper to outline FET temperature characteristics.

Author: Sinclair, John C.
Affiliation: Zenith Radio Corporation, Chicago, IL
AES Convention: 34 (April 1968) Paper Number: 557
Publication Date: April 1, 1968

Click to purchase paper as a non-member or you can login as an AES member to see more options.

No AES members have commented on this paper yet.

Subscribe to this discussion

To be notified of new comments on this paper you can subscribe to this RSS feed. Forum users should login to see additional options.

Start a discussion!

If you would like to start a discussion about this paper and are an AES member then you can login here:
Username:
Password:

If you are not yet an AES member and have something important to say about this paper then we urge you to join the AES today and make your voice heard. You can join online today by clicking here.