This paper describes a fully programmable integrated signal processor for digital audio signals (audio signal processor). The key features of the ASP chip are: 1 160 ns instruction cycle time, a 12*24 multiplier, and a wide accumulator. It also contains three separate RAMs, one for storing the program, a second for the audio data, and a third for the coefficients. The chip has several serial audio data interfaces (IIS format), a parallel data interface, and a serial control interface (IIC format). This chip contains all functions for the investigation and the realization of digital sound processing features.
Authors:
Vandenbulcke, C.; Verspay, J.; Bakker, P.; Persoon, E.; Odijk, E.; van Twist, R.
Affiliation:
Philips B.V., Eindhoven, The Netherlands
AES Convention:
77 (March 1985)
Paper Number:
2181
Publication Date:
March 1, 1985
Subject:
Digital and Analog Recording
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