As the resolution of digital-to-analog converters (DACs) increases, testing and integrating the devices into digital audio systems becomes difficult. Performance degradation can occur due to many subtle phenomena usually not considered. This document presents techniques used by UltraAnalog to test a Dual 20 Bit 200 KHz DAC, and many of the techniques can be applied when integrating high resolution DACs into digital systems. The test system block diagram is presented and discussed with particular attention to maintaining output signal integrity. Jitter on the output deglitcher hold signal is eliminated by the use of an ultra-low jitter programmable clock (<3ps jitter). A proper grounding scheme, also presented herein, prevents the contamination of the sensitive analog section by digital noise. Additional testing errors caused by analog output filters and limitations of commercial test systems are also discussed and solutions are proposed. The overall test system allows D/A Converter distortion-plus-noise measurements better than -110dBc.
Author:
Fourre, Remy D.
Affiliation:
UltraAnalog, Fremont, CA
AES Conference:
7th International Conference: Audio in Digital Times (May 1989)
Paper Number:
7-012
Publication Date:
May 1, 1989
Subject:
Audio in Digital Times
Click to purchase paper as a non-member or you can login as an AES member to see more options.
No AES members have commented on this paper yet.
To be notified of new comments on this paper you can subscribe to this RSS feed. Forum users should login to see additional options.
If you are not yet an AES member and have something important to say about this paper then we urge you to join the AES today and make your voice heard. You can join online today by clicking here.